Search Results
2 recordsMedian $119,990Avg $119,990Min $119,990Max $119,990
Showing 1–2 of 2 results
| Employer | Job Title | Base Salary ↓ | City / State | Year | Submitted | Start Date |
|---|---|---|---|---|---|---|
| Arista Networks, Inc | FPGA Design Engineer | $119,990 | Santa Clara, CA | 2025 | 2025-04-17 | 2025-10-01 |
| Arista Networks, Inc | FPGA Design Engineer | $119,990 | Santa Clara, CA | 2025 | 2025-04-17 | 2025-10-01 |